1 - 10 of 12 Chapters
[This chapter introduces VLSI technology; trends in terms of integrated circuit complexity, performance, power, and physical size; and the future direction. It also describes challenges posed by emerging trends on design methodology to make it work a first time success. It introduces the concept...
[This chapter deals with introduction to system on chip (SOC), constituents of SOC and few examples of SOCs, followed by SOC development cycle, design planning, design requirements, the design center infrastructure, design and verification intellectual properties IPs, and design flows of...
[This chapter deals with major constituents of typical system on chip (SOC) with their relevance, criteria for choosing the right cores to integrate in SOC, and design challenges they throw during SOC design integration.]
[This chapter discusses different VLSI design techniques highlighting coding style for synthesis. It covers important design concepts like synchronous and asynchronous circuits, clock and reset circuits, clock domain crossovers, speed matching, and so on. In addition, it deals with behavioral...
[This chapter deals with the synthesis of SOC, detailing the strategies adopted for synthesis of different constituents of SOC. It also deals with standard cell library selection, SOC design constraints, Synthesis optimization, Synthesis report generation, intrepretation of the reports and some...
[This chapter explain the timing analysis techniques, tools for timing analysis, concept of design corners, challenges of on-chip variations in advanced technology nodes, and a few tips to address those challenges for achieving SOC timing closure.]
[This chapter describes requirement for testability, the design for testability (DFT) of SOC. It explains the methodology widely followed for SOC DFT and the automatic test pattern generation (ATPG) techniques. It covers the major challenges faced during SOC design in the context of DFT. This...
[This chapter deals with the importance of SOC design verification, plan and strategies adopted for verification. It defines functional simulation, functional coverage, code coverage, and other important terms used in verification. Importance of FPGA validation and how it complements the SOC...
[This chapter deals with the SOC design as re-convergent model and physical design process of the system on chip (SOC). The complete physical design flow is explained in this chapter starting from floor plan to design tape-out. It defines the re-convergent model of the SOC design and introduces...
[This chapter deals with the physical design verification of a system on chip, which are logic equivalence check and STA analysis flow carried out at every stage of the physical design of a SOC. The chapter explains electrical rules checks (ERC), verification of interconnect effects, like cross...
Read and print from thousands of top scholarly journals.
Continue with Facebook
Sign up with Google
Log in with Microsoft
Already have an account? Log in
Bookmark this article. You can see your Bookmarks on your DeepDyve Library.
To save an article, log in first, or sign up for a DeepDyve account if you don’t already have one.
Sign Up Log In
To subscribe to email alerts, please log in first, or sign up for a DeepDyve account if you don’t already have one.
To get new article updates from a journal on your personalized homepage, please log in first, or sign up for a DeepDyve account if you don’t already have one.