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Active memory: a new abstraction for memory system simulation

Active memory: a new abstraction for memory system simulation Active Memory: A New Abstraction for Memory System Simulation ALVIN R. LEBECK and DAVID A. WOOD Duke University and University of Wisconsin, Madison This article describes the active memory abstraction for memory-system simulation. In this abstraction ” designed specifically for on-the-fly simulation ”memory references logically invoke a user-specified function depending upon the reference ™s type and accessed memory block state. Active memory allows simulator writers to specify the appropriate action on each reference, including œno action  for the common case of cache hits. Because the abstraction hides implementation details, implementations can be carefully tuned for particular platforms, permitting much more efficient on-the-fly simulation than the traditional trace-driven abstraction. Our SPARC implementation, Fast-Cache, executes simple data cache simulation 2 to 6 times slower than the original, uninstrumented program on a SPARCstation 10; a procedure call based trace-driven simulator is 7 to 16 times slower than the original program, and a trace-driven simulator that buffers references in memory to amortize procedure call overhead is 3 to 8 times slower. Fast-Cache implements active memory by performing a fast table look up of the memory block state, taking as few as 3 cycles on a SuperSPARC for the no-action case. Modeling http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Transactions on Modeling and Computer Simulation (TOMACS) Association for Computing Machinery

Active memory: a new abstraction for memory system simulation

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Publisher
Association for Computing Machinery
Copyright
Copyright © 1997 by ACM Inc.
ISSN
1049-3301
DOI
10.1145/244804.244806
Publisher site
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Abstract

Active Memory: A New Abstraction for Memory System Simulation ALVIN R. LEBECK and DAVID A. WOOD Duke University and University of Wisconsin, Madison This article describes the active memory abstraction for memory-system simulation. In this abstraction ” designed specifically for on-the-fly simulation ”memory references logically invoke a user-specified function depending upon the reference ™s type and accessed memory block state. Active memory allows simulator writers to specify the appropriate action on each reference, including œno action  for the common case of cache hits. Because the abstraction hides implementation details, implementations can be carefully tuned for particular platforms, permitting much more efficient on-the-fly simulation than the traditional trace-driven abstraction. Our SPARC implementation, Fast-Cache, executes simple data cache simulation 2 to 6 times slower than the original, uninstrumented program on a SPARCstation 10; a procedure call based trace-driven simulator is 7 to 16 times slower than the original program, and a trace-driven simulator that buffers references in memory to amortize procedure call overhead is 3 to 8 times slower. Fast-Cache implements active memory by performing a fast table look up of the memory block state, taking as few as 3 cycles on a SuperSPARC for the no-action case. Modeling

Journal

ACM Transactions on Modeling and Computer Simulation (TOMACS) – Association for Computing Machinery

Published: Jan 1, 1997

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