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WORKSHOP REPORT: HIGH LEVEL SYNTHESIS Seventh International Symposium on High-Level Synthesis Program May 18-20, 1994 Niagara-on-the-Lake, Ontario, Canada Sponsored by: IEEE Computer Society DTAC, and Association for Computing Machinery SIGDA. Session 3: Retargetable Code Generation Session Chair: Dominique Genin, EDC An Integrated Approach to Retargetable Code Generation T. Wilson, G. Grewal, B. Halley, and D. Banerji Bit-Alignment for Retargetable Code Generators K. Schoofs, G. Goossens, and H. De Man In cooperation with: IFIP Workgroups 10 2 and 10 5, with corporate support by: Canadian Microelectronics Corporation, Waterloo Institute for Computer Research, and Bell-Northern Research. Code Generationfor a DSP Processor W.-K Cheng and Y.L. Lin Retargetable Assembly Code Generation by Bootstrapping R. Leupers, W. Schenk, and P. Marwedel CodeSyn: A Retargetable Code Synthesis System P.G. Paulin, C. Liem, T.C. Ma X and S. Sutarwala (Talk Only) Invited Talk: Hardware~SoftwareCo-Verification in ATM Giovanni Mancini, Bell-Northern Research. Session 1: Hardware/Software Systems Session Chair: Robert Hum, Cadence Design. Session 4: Verification, Test, and Fault-Tolerant Systems Session Chair: Mike McFarland, Boston College A Methodology for Simulation and Synthesis of Mixed Hardware~Software Systems A. Kalavade and E.A. Lee (Talk Only) Concurrent Testing in High-Level Synthesis R. Singh and J. Knight Instruction Set Definition and
ACM SIGDA Newsletter – Association for Computing Machinery
Published: Oct 1, 1994
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