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The implementation of a digital filter bank

The implementation of a digital filter bank A review of the VLSI implementation methodology for real-time digital signal processing, particularly for a digital filter bank design, is presented in this paper. The emphasis is placed on exploiting multilevel parallelisms in the computation algorithm and implementation conditions. Some of the parallel processing techniques for maximum efficiency based on VLSI multiprocessor implementation are discussed. A special purpose systolic array architecture for a second-order recursive digital filter module is developed. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM SIGDA Newsletter Association for Computing Machinery

The implementation of a digital filter bank

Lin, Haiyan
ACM SIGDA Newsletter , Volume 15 (3) – Sep 1, 1985
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Publisher
Association for Computing Machinery
Copyright
Copyright © 1985 by ACM Inc.
ISSN
0163-5743
DOI
10.1145/1232851.1232854
Publisher site
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Abstract

A review of the VLSI implementation methodology for real-time digital signal processing, particularly for a digital filter bank design, is presented in this paper. The emphasis is placed on exploiting multilevel parallelisms in the computation algorithm and implementation conditions. Some of the parallel processing techniques for maximum efficiency based on VLSI multiprocessor implementation are discussed. A special purpose systolic array architecture for a second-order recursive digital filter module is developed.

Journal

ACM SIGDA Newsletter – Association for Computing Machinery

Published: Sep 1, 1985

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