Get 20M+ Full-Text Papers For Less Than $1.50/day. Start a 14-Day Trial for You or Your Team.

Learn More →

Trap-driven memory simulation with Tapeworm II

Trap-driven memory simulation with Tapeworm II Trap-Driven Memory Simulation with Tapeworm II RICHARD UHLIG, DAVID NAGLE, TREVOR MUDGE, and STUART SECHREST University of Michigan, Ann Arbor Trap-driven simulation is a new approach for analyzing the performance of memory-system components such as caches and translation-lookaside buffers (TLBs). Unlike the more traditional trace-driven approach to simulating memory systems, trap-driven simulation uses the hardware of a host machine to drive simulations with operating-system kernel traps instead of with address traces. As a workload runs, a trap-driven simulator dynamically modifies access to memory in such a way as to make memory traps correspond exactly to misses in a simulated cache structure. Because traps are handled inside the kernel of the host operating system, a trap-driven simulator can monitor all components of multitask workloads including the operating system itself. Compared to trace-driven simulators, a trap-driven simulator causes relatively little slowdown to the host system because traps occur only in the infrequent case of simulated cache misses. Unfortunately, because they require special forms of hardware support to cause memory-access traps, trap-driven simulators are difficult to port, and they are not as flexible as trace-driven simulators in the types of memory configurations that they can model. Several researchers have recently begun http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Transactions on Modeling and Computer Simulation (TOMACS) Association for Computing Machinery

Trap-driven memory simulation with Tapeworm II

Download PDF
35 pages

Loading next page...
 
/lp/association-for-computing-machinery/trap-driven-memory-simulation-with-tapeworm-ii-gENTFuep8i
Publisher
Association for Computing Machinery
Copyright
Copyright © 1997 by ACM Inc.
ISSN
1049-3301
DOI
10.1145/244804.244805
Publisher site
See Article on Publisher Site

Abstract

Trap-Driven Memory Simulation with Tapeworm II RICHARD UHLIG, DAVID NAGLE, TREVOR MUDGE, and STUART SECHREST University of Michigan, Ann Arbor Trap-driven simulation is a new approach for analyzing the performance of memory-system components such as caches and translation-lookaside buffers (TLBs). Unlike the more traditional trace-driven approach to simulating memory systems, trap-driven simulation uses the hardware of a host machine to drive simulations with operating-system kernel traps instead of with address traces. As a workload runs, a trap-driven simulator dynamically modifies access to memory in such a way as to make memory traps correspond exactly to misses in a simulated cache structure. Because traps are handled inside the kernel of the host operating system, a trap-driven simulator can monitor all components of multitask workloads including the operating system itself. Compared to trace-driven simulators, a trap-driven simulator causes relatively little slowdown to the host system because traps occur only in the infrequent case of simulated cache misses. Unfortunately, because they require special forms of hardware support to cause memory-access traps, trap-driven simulators are difficult to port, and they are not as flexible as trace-driven simulators in the types of memory configurations that they can model. Several researchers have recently begun

Journal

ACM Transactions on Modeling and Computer Simulation (TOMACS) – Association for Computing Machinery

Published: Jan 1, 1997

There are no references for this article.