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CMOS-MEMS resonator as a signal generator for fully-adiabatic logic circuits

CMOS-MEMS resonator as a signal generator for fully-adiabatic logic circuits Fully-adiabatic (thermodynamically reversible) logic is one of the few promising approaches to low-power logic design. To maximize the system power-performance of an adiabatic circuit requires an ultra low-loss on-chip clock source, which can generate an output signal with a quasi-trapezoidal (flat-topped) voltage waveform. In this paper, we propose to use high- Q MEMS resonators to generate the custom waveform. The big challenge in the MEMS resonator design is that a non-sinusoidal (quasi-trapezoidal) waveform needs to be generated even though the resonator oscillates sinusoidally. Our solution is to customize the shape of the sensing comb fingers of the resonator, with the result that the sensing capacitance varies quasi-trapezoidally. The effective quality factor and the area-efficiency of the microstructure have been optimized so as to minimize the whole system"s power dissipation and cost at a given frequency. A resonator design with a 100 kHz resonant frequency based on a standard TSMC 0.35ॖm CMOS process has been fabricated. The resonator has an area of 300 ॖm by 160 ॖm with a thickness of 30 ॖm. Three-dimensional field simulation shows that the resonator generates a quasi-trapezoidal waveform when it operates at its resonance. An on-chip buffer is also designed for monitoring the waveform generated by the MEMS resonator. The post-CMOS fabrication process is compatible with standard CMOS processes. Thus the custom clock generator can be integrated with logic circuits on the same CMOS chip. The size of the MEMS resonator can be further reduced by design optimization and advances in micro/nano-fabrication technology. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Proceedings of SPIE SPIE

CMOS-MEMS resonator as a signal generator for fully-adiabatic logic circuits

Proceedings of SPIE , Volume 5649 (1) – Feb 28, 2005

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Publisher
SPIE
Copyright
Copyright © 2005 COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.
ISSN
0277-786X
eISSN
1996-756X
DOI
10.1117/12.582184
Publisher site
See Article on Publisher Site

Abstract

Fully-adiabatic (thermodynamically reversible) logic is one of the few promising approaches to low-power logic design. To maximize the system power-performance of an adiabatic circuit requires an ultra low-loss on-chip clock source, which can generate an output signal with a quasi-trapezoidal (flat-topped) voltage waveform. In this paper, we propose to use high- Q MEMS resonators to generate the custom waveform. The big challenge in the MEMS resonator design is that a non-sinusoidal (quasi-trapezoidal) waveform needs to be generated even though the resonator oscillates sinusoidally. Our solution is to customize the shape of the sensing comb fingers of the resonator, with the result that the sensing capacitance varies quasi-trapezoidally. The effective quality factor and the area-efficiency of the microstructure have been optimized so as to minimize the whole system"s power dissipation and cost at a given frequency. A resonator design with a 100 kHz resonant frequency based on a standard TSMC 0.35ॖm CMOS process has been fabricated. The resonator has an area of 300 ॖm by 160 ॖm with a thickness of 30 ॖm. Three-dimensional field simulation shows that the resonator generates a quasi-trapezoidal waveform when it operates at its resonance. An on-chip buffer is also designed for monitoring the waveform generated by the MEMS resonator. The post-CMOS fabrication process is compatible with standard CMOS processes. Thus the custom clock generator can be integrated with logic circuits on the same CMOS chip. The size of the MEMS resonator can be further reduced by design optimization and advances in micro/nano-fabrication technology.

Journal

Proceedings of SPIESPIE

Published: Feb 28, 2005

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