Designing TSVs for 3D Integrated CircuitsCarbon Nanotubes for Advancing TSV Technology
Designing TSVs for 3D Integrated Circuits: Carbon Nanotubes for Advancing TSV Technology
Khan, Nauman; Hassoun, Soha
2012-08-27 00:00:00
[Resistivity, current density, and electromigration create concerns regarding the viability of copper (Cu) for interconnect in future CMOS technologies [13, 20, 70]. Carbon Nanotubes (CNTs) have emerged as a promising technology to meet these challenges [12, 78, 99]. We investigate in this chapter the feasibility of using CNTs for power delivery in a 3-D IC. We evaluate CNTs as TSVs and as on-chip power grid. We demonstrate that using CNTs in the power delivery network (PDN) of a 3-D IC results in tremendous reduction in the area occupied by TSVs for power delivery. Power can be delivered at coarser granularity while using CNT, thus requiring less number of TSVs and resulting in smaller chip area dedicated to TSVs.]
http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.pnghttp://www.deepdyve.com/lp/springer-journals/designing-tsvs-for-3d-integrated-circuits-carbon-nanotubes-for-pTm00DvwFV
Designing TSVs for 3D Integrated CircuitsCarbon Nanotubes for Advancing TSV Technology
[Resistivity, current density, and electromigration create concerns regarding the viability of copper (Cu) for interconnect in future CMOS technologies [13, 20, 70]. Carbon Nanotubes (CNTs) have emerged as a promising technology to meet these challenges [12, 78, 99]. We investigate in this chapter the feasibility of using CNTs for power delivery in a 3-D IC. We evaluate CNTs as TSVs and as on-chip power grid. We demonstrate that using CNTs in the power delivery network (PDN) of a 3-D IC results in tremendous reduction in the area occupied by TSVs for power delivery. Power can be delivered at coarser granularity while using CNT, thus requiring less number of TSVs and resulting in smaller chip area dedicated to TSVs.]
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