Designing TSVs for 3D Integrated CircuitsTSVs for Power Delivery
Designing TSVs for 3D Integrated Circuits: TSVs for Power Delivery
Khan, Nauman; Hassoun, Soha
2012-08-27 00:00:00
[Robust power delivery is one of the ITRS scaling grand challenges due to increasing operating frequencies, increasing power density, and decreasing supply voltages. Three dimensional stacking of multiple dies makes this problem even more challenging. In a 3-D IC, only the die adjacent to the package can get power directly from the package. Dies away from the package require new technologies for power delivery. We evaluate in this chapter using TSVs to deliver power in a 3-D IC with the goal of understanding factors that contribute to the performance of a 3-D power delivery network (PDN). We investigate the impact of TSV size. We study various architectural configurations to find the best TSV granularity. We explore the impact of shared and dedicated TSVs on PDN performance and the feasibility of coaxial TSVs for power delivery.]
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Designing TSVs for 3D Integrated CircuitsTSVs for Power Delivery
[Robust power delivery is one of the ITRS scaling grand challenges due to increasing operating frequencies, increasing power density, and decreasing supply voltages. Three dimensional stacking of multiple dies makes this problem even more challenging. In a 3-D IC, only the die adjacent to the package can get power directly from the package. Dies away from the package require new technologies for power delivery. We evaluate in this chapter using TSVs to deliver power in a 3-D IC with the goal of understanding factors that contribute to the performance of a 3-D power delivery network (PDN). We investigate the impact of TSV size. We study various architectural configurations to find the best TSV granularity. We explore the impact of shared and dedicated TSVs on PDN performance and the feasibility of coaxial TSVs for power delivery.]
Published: Aug 27, 2012
Keywords: Power Grid; Functional Block; Silicon Area; Power Delivery; Voltage Droop
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