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Energy Efficient High Performance ProcessorsCompiler-Directed Energy Efficiency

Energy Efficient High Performance Processors: Compiler-Directed Energy Efficiency [Modern superscalar CPUs contain large complex structures and diverse execution units, consuming wide dynamic power range. Building power delivery network for the worst-case power consumption is not energy efficient and often impossible to fit in small systems. Instantaneous power excursions can cause voltage droops. Power management algorithms are too slow to respond to instantaneous events. In this work, we propose a novel compiler-directed framework to address this problem. The framework is validated on a 4th Generation Intel® Core™ processor and with simulator on output trace. Up to 16% performance speedup is measured over baseline for the SPEC CPU2006 benchmarks.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

Energy Efficient High Performance ProcessorsCompiler-Directed Energy Efficiency

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Publisher
Springer Singapore
Copyright
© Springer Nature Singapore Pte Ltd. 2018
ISBN
978-981-10-8553-6
Pages
107 –133
DOI
10.1007/978-981-10-8554-3_4
Publisher site
See Chapter on Publisher Site

Abstract

[Modern superscalar CPUs contain large complex structures and diverse execution units, consuming wide dynamic power range. Building power delivery network for the worst-case power consumption is not energy efficient and often impossible to fit in small systems. Instantaneous power excursions can cause voltage droops. Power management algorithms are too slow to respond to instantaneous events. In this work, we propose a novel compiler-directed framework to address this problem. The framework is validated on a 4th Generation Intel® Core™ processor and with simulator on output trace. Up to 16% performance speedup is measured over baseline for the SPEC CPU2006 benchmarks.]

Published: Mar 23, 2018

Keywords: Voltage Sag; Power Delivery Network (PDN); Power Excursion; Core™ Processor; Emergency Voltage

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