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Memristor-Based Nanoelectronic Computing Circuits and ArchitecturesHigh-Radix Arithmetic-Logic Unit (ALU) Based on Memristors

Memristor-Based Nanoelectronic Computing Circuits and Architectures: High-Radix Arithmetic-Logic... [This chapter presents a novel method for implementing crossbar-based multi-level memories, where each cross-point cell stores multiple bits. Furthermore, a conceptual solution for novel CMOS-compatible, memristive, high-radix arithmetic logic units (ALUs) is proposed, for future computing systems. More specifically, a hybrid ALU circuit nano-architecture is described, where: (a) CMOS peripheral circuits are used for binary arithmetic operations; (b) a memristive reconfigurable crossbar-based memory block is used to: (i) allow parallel read/write of data; (ii) facilitate the implementation of efficient arithmetic algorithms (e.g. fast partial product creation for multiplication); and (iii) store information in a compact, high-radix form. Instead of single memristors, the crossbar nodes comprise a type of multi-state composite memristive switches, described in Chap. 3, which permit multi-bit storage in a more robust manner. Radix-4 representation is used because: (i) it balances the offered advantages with the peripheral binary conversion circuitry overhead; and (ii) it provides a good density/reliability trade-off. The fine operation and accuracy of the proposed system architecture is demonstrated through SPICE-level simulations.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

Memristor-Based Nanoelectronic Computing Circuits and ArchitecturesHigh-Radix Arithmetic-Logic Unit (ALU) Based on Memristors

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Publisher
Springer International Publishing
Copyright
© Springer International Publishing Switzerland 2016
ISBN
978-3-319-22646-0
Pages
149 –172
DOI
10.1007/978-3-319-22647-7_6
Publisher site
See Chapter on Publisher Site

Abstract

[This chapter presents a novel method for implementing crossbar-based multi-level memories, where each cross-point cell stores multiple bits. Furthermore, a conceptual solution for novel CMOS-compatible, memristive, high-radix arithmetic logic units (ALUs) is proposed, for future computing systems. More specifically, a hybrid ALU circuit nano-architecture is described, where: (a) CMOS peripheral circuits are used for binary arithmetic operations; (b) a memristive reconfigurable crossbar-based memory block is used to: (i) allow parallel read/write of data; (ii) facilitate the implementation of efficient arithmetic algorithms (e.g. fast partial product creation for multiplication); and (iii) store information in a compact, high-radix form. Instead of single memristors, the crossbar nodes comprise a type of multi-state composite memristive switches, described in Chap. 3, which permit multi-bit storage in a more robust manner. Radix-4 representation is used because: (i) it balances the offered advantages with the peripheral binary conversion circuitry overhead; and (ii) it provides a good density/reliability trade-off. The fine operation and accuracy of the proposed system architecture is demonstrated through SPICE-level simulations.]

Published: Aug 27, 2015

Keywords: Partial Product; Resistive Random Access Memory; Memory Word; Programming Signal; Reference Resistor

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