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Memristor-Based Nanoelectronic Computing Circuits and ArchitecturesNetworks of Memristors and Memristive Components

Memristor-Based Nanoelectronic Computing Circuits and Architectures: Networks of Memristors and... [Memristors demonstrate a natural basis for computation that combines information processing and storage in the memory itself. A very powerful and promising memristor-based computing structure, which implements analog parallel computations, is the memristor network. In such structure there is continuous information exchange during calculations which renders a tremendous increase of computational power due to the massively parallel network dynamics. In this chapter we explore this computing concept via numerical and circuit simulations for the purpose of investigating the network dynamics, utilizing the well-documented physics of single devices and known network topologies. We address two of the probably most well-known inherently complex problems, in terms of computation time, i.e. the shortest path and the maze-solving problems, via computations in memristor networks. For these specific problems we further extend already proposed memristor network-based computing approaches by introducing certain modifications in the computing platform. Several scenarios are examined considering also the inclusion of devices with different switching characteristics in the same computation. Additionally, we address the appropriate mapping issue of graph-based computational problems via a novel modeling approach, which is based on specific circuit models describing several types of edges connecting the graph vertices. The emergence of new functionalities opens doors to exciting new computing concepts and encourages the development of parallel memristive computing systems.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

Memristor-Based Nanoelectronic Computing Circuits and ArchitecturesNetworks of Memristors and Memristive Components

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/lp/springer-journals/memristor-based-nanoelectronic-computing-circuits-and-architectures-ecul03aVjR
Publisher
Springer International Publishing
Copyright
© Springer International Publishing Switzerland 2016
ISBN
978-3-319-22646-0
Pages
173 –198
DOI
10.1007/978-3-319-22647-7_7
Publisher site
See Chapter on Publisher Site

Abstract

[Memristors demonstrate a natural basis for computation that combines information processing and storage in the memory itself. A very powerful and promising memristor-based computing structure, which implements analog parallel computations, is the memristor network. In such structure there is continuous information exchange during calculations which renders a tremendous increase of computational power due to the massively parallel network dynamics. In this chapter we explore this computing concept via numerical and circuit simulations for the purpose of investigating the network dynamics, utilizing the well-documented physics of single devices and known network topologies. We address two of the probably most well-known inherently complex problems, in terms of computation time, i.e. the shortest path and the maze-solving problems, via computations in memristor networks. For these specific problems we further extend already proposed memristor network-based computing approaches by introducing certain modifications in the computing platform. Several scenarios are examined considering also the inclusion of devices with different switching characteristics in the same computation. Additionally, we address the appropriate mapping issue of graph-based computational problems via a novel modeling approach, which is based on specific circuit models describing several types of edges connecting the graph vertices. The emergence of new functionalities opens doors to exciting new computing concepts and encourages the development of parallel memristive computing systems.]

Published: Aug 27, 2015

Keywords: Short Path; Destination Node; Cellular Automaton; High Resistive State; Switching Characteristic

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